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INTEGRATED CIRCUITS
DATA SHEET
OM5193H Disk drive spindle and VCM with servo controller
Product specification File under Integrated Circuits, IC11 1998 Nov 02
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
CONTENTS 1 1.1 1.2 1.2.1 1.2.2 1.3 2 3 3.1 3.2 3.3 3.4 4 5 6 7 8 8.1 8.2 8.3 8.3.1 8.3.2 8.4 8.4.1 8.4.2 8.4.3 8.4.4 8.4.5 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 8.13 8.14 8.15 8.16 8.17 8.17.1 8.17.2 8.18 FEATURES Servo control Motor control Spindle motor driver Voice coil motor driver Miscellaneous items APPLICATIONS GENERAL DESCRIPTION Overview Servo controller Spindle and voice coil motor Safety functions QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAMS PINNING FUNCTIONAL DESCRIPTION Serial interface Commutation and sleep mode Commutation control Blanks, Watchdog and Start-up delays Comdelim delay 10-bit ADC with 7 analog inputs Input channels Input ranges Conversion modes Programming register#0 Converter clock frequency values 10-bit VCM DAC Reference voltage Stand-alone op-amps Analog switch Charge pump voltage Spindle driver VCM driver Park the VCM Precharge the VCM Brake the motor Power-on reset Thermal monitor and shutdown Power supply isolation External isolation diode External power FET Thermal behaviour 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 LIMITING VALUES HANDLING
OM5193H
THERMAL CHARACTERISTICS CHARACTERISTICS APPLICATION INFORMATION PACKAGE OUTLINE SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
1 1.1 FEATURES Servo control 1.3 Miscellaneous items
OM5193H
* 10-bit VCM Digital-to-Analog Converter (DAC) * 7-channel 10-bit Analog-to-Digital Converter (ADC) * Programmable spindle commutation control logic * 3-wire serial interface * Two stand-alone operational amplifiers (op-amps) with outputs connected to the ADC * Analog multiplexer with two inputs used to select VCM seek mode or track-following mode. 1.2 1.2.1 Motor control SPINDLE MOTOR DRIVER
* Precision low voltage 5 and 12 V power monitor with hysteresis * Precision internal voltage reference for servo and power control circuits * Thermal sense circuit with over-temperature shutdown sensor * Internal charge pump voltage generator * Automatic brake-after-park at power-down, thermal shutdown or sleep mode * Sleep mode: low power consumption mode. 2 APPLICATIONS
* 3-phase output motor driver * 1.9 A maximum available start-up current * Total Rds(on) = 0.6 (typical) at 25 C * Back ElectroMotive Force (BEMF) processing for sensorless motor commutation * Linear current control * External current sense resistor * External current control loop compensation * Adjustable slew rate control * Short-circuit brake * Adjustable brake-after-park delay time. 1.2.2 VOICE COIL MOTOR DRIVER
* 12 V hard disk drive products. 3 3.1 GENERAL DESCRIPTION Overview
The OM5193H is a combination of a voice coil motor and a spindle motor driver with embedded servo controller designed for use in disk drives. Configuration and control registers are set via a 3-wire serial port running up to 30 MHz to interface commonly to a microcontroller or a digital signal processor. The device operates at 5 and 12 V power supplies and integrates safety functions such as power stages overvoltage protection, power and temperature monitor, over-temperature shutdown and dynamic brake-after-park. The device is contained in a QFP80 package with 18 pins connected to the leadframe thus providing low thermal resistance. 3.2 Servo controller
* 1.5 A maximum current capability * Total Rds(on) = 0.8 (typical) at 25 C * Linear class AB output with low cross-over distortion delay * Precision current control loop with external current sense resistor * Programmable seek and track-following mode with adjustable current loop gain * External current control loop compensation * Precharge during brake mode * 20 kHz current control loop bandwidth * Parking function * Adjustable park voltage with limiter.
The servo controller includes the following circuits: * 3-wire serial interface * Spindle commutation logic * A 10-bit ADC with 7 inputs selected by an internal multiplexer * A 10-bit VCM DAC with 1.5, 2.5 and 3.5 V voltage references * Two low-offset stand-alone op-amps * Analog multiplexer with 2 inputs.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
The serial interface is used: * To adjust the timing parameters for proper spindle commutation sequence * To accurately adjust head positioning via the 10-bit VCM DAC * To set VCM seek or track-following mode via the low-impedance switch * To select and process analog signals via a 7-channel multiplexer connected to the 10-bit ADC. The spindle commutation logic circuit ensures proper spindle start-up (no reverse rotation) and commutation sequence for the spindle driver by processing BEMF sensing circuit output signals. The two stand-alone op-amps, with the inputs connected to the read channel IC, provide servo track signals processed by the microcontroller to perform accurate track-following mode. 3.3 Spindle and voice coil motor 3.4 Safety functions
OM5193H
The OM5193H is protected against transient voltage spikes that are generated by the inductive loads of spindle and VCM. Power supplies and temperature are monitored in order to guarantee data reliability and self-protection of the device in case of power loss or temperatures beyond maximum rating. Park and brake functions secure heads and disk media in case of power-down or high temperature failure. This function is also activated by the sleep mode. An internal temperature monitor is available to monitor the chip temperature and thus prevents over-temperature shutdown. Internally connected to the ADC channel 4, it can be used by the microcontroller as an early `temperature-too-high' warning during a long VCM seek sequence.
The OM5193H drives a 3-phase brushless, sensorless DC spindle motor and a voice coil motor. Spindle and voice coil motor power stages with low Rds(on) and high current capability are suitable for mid-end and low-end 12 V disk drives. Power stages are designed in such a way that external Schottky diodes are not needed. Spindle current is sensed by an external resistor and monitored by the external signal SPCC (SPindle Current Control). Spindle speed is regulated by the microcontroller via the ZCROSS signal (Zero CROSSing detection frequency output). BEMF comparators provide the digital zero crossing signals. These are processed by the commutation logic circuit to properly switch-on and switch-off spindle power drivers thus ensuring the rotation of the motor. The control of the heads positioning is accomplished by the internal 10-bit VCM DAC. Seek and track-following VCM current loop gain is set by external resistors. VCM zero current is referenced to the 2.5 V internal voltage reference. An internal precharge of the actuator (magnetic latch) during brake mode guarantees total control of the current when VCM starts running without current spikes.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
4 QUICK REFERENCE DATA SYMBOL Supply voltage VDDA1 VDDD VDDA2 Drivers ISPOUT IVCMRUN 5 spindle start-up current VCM current - - - - 5 V analog supply voltage 5 V digital supply voltage 12 V analog supply voltage 4.5 4.5 10.8 5.0 5.0 12.0 PARAMETER MIN. TYP.
OM5193H
MAX.
UNIT
5.5 5.5 13.2
V V V
1.9 1.5
A A
ORDERING INFORMATION TYPE NUMBER PACKAGE NAME QFP80 DESCRIPTION plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm VERSION SOT318-2
OM5193H
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
6 BLOCK DIAGRAMS
OM5193H
Figures 1, 2, 3 and 4 provide block diagrams of the OM5193H servo and motor control (top level diagram, servo controller, spindle motor driver and voice coil motor driver).
handbook, full pagewidth
BRAKEDELAY MOTA 72 MOTB 74 MOTC 3 BRAKEPOWER 48
PARKVOLT
BRAKEADJH 50 49 51 1, 4 to 7, 58 to 61, 64 to 67, 70, 75, 78 to 80
18
CLAMP CLAMP1 CLAMP2 CLAMP3 SLEW SPCCOUT SPCC MOTSENSE3 MOTSENSE2 MOTSENSE1/ SPSENSEH GNDS/SPSENSEL CT 10 55 56 12 14 13 73 76 2 11 9
POWER STAGE
HEATSINK
20 PARK AND BRAKE SPINDLE CONTROL 27
VDDD DGND
8 THERMAL SHUTDOWN 16 CHARGE PUMP 17 18
SWITCHGATE BSTCP1 BSTCP2 CAPY
COMA COMB COMC ZCROSS 25 COMMUTATION LOGIC
ACROSS BCROSS CCROSS
OM5193H
POWER-ON RESET
46 47 45 19
CHK5 CHK12 CPOR
CLOCK SCLOCK SDEN SDATA SCANTEST VDDA1 VDDA2 AGND INTINN INTIN ADC[0]/INTOUT PESAMPN PESAMP ADC[1]/DIFOUT
24 23 21 22 26 44 15 39 0 37 38 28 35 36 29 30 31 32 33 ADC[2]/SOUT ADC[5] 34 40 42 41 DACOUT 43 53 52 CLAMP
MGM972
SERIAL INTERFACE
POR 57 77 PWRBIAS1 PWRBIAS2
7-CHANNEL 10-BIT ADC 12345
10-BIT VCM DAC 6 0.5VDDA1 BANDGAP VCM POWER CONTROL STAGE
69
NIVCM
71 68 63 54 THERMAL MONITOR 62
GNDVCM1 GNDVCM2 GNDVCM3 GNDV
A2
A1
VCM SWITCH
IVCM
SEEKSELECT VCMIN
VCMSENSEH
ADC[3] ADC[4]/TEMP
REF2V5 TRACKFWSELECT
VCMSENSEL
Fig.1 Block diagram, top level.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
19 POR ZCROSS CLOCK SCANTEST SDEN SDATA SCLOCK 25 24 26 21 22 23 SERIAL INTERFACE COMMUTATION LOGIC
POWER-ON RESET
COMA COMB COMC ACROSS BCROSS CCROSS
10-BIT ADC
10-BIT VCM DAC
34
DACOUT
RANGE ADAPTER Vref3V5
OM5193H
INPUT MULTIPLEXER VDDA1 A2
Vref2V5
2.5 V BANDGAP
INTINN INTIN
37 38
43 Vref1V5 VCM switch
VCMIN
PESAMPN PESAMP
35 36 A1 28 29 30 31 32 33 ADC[0]/INTOUT ADC[1]/DIFOUT ADC[5] ADC[4]/TEMP
Vref2V5
for VCM 39 20 VDDD 27 41 42
40
44
VDDA1 REF2V5 AGND
SEEKSELECT DGND TRACKFWSELECT
MGM973
ADC[2]/SOUT ADC[3]
Fig.2 Block diagram, servo controller.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
CCPOR VDDA1 VDDA2 CPOR 44 15 45
CCAPX
CCAPY
BSTCP1 BSTCP2 CAPY 16 17 18
PWRBIAS1 PWRBIAS2 57 77 8
VDDA2POWER
CHK5 46 CHK12 47 CCHK5 POR 19 POWER-ON RESET CHARGE PUMP
OM5193H
SWITCH GATE 10 CLAMP1
CCHK12 ADC[4]/TEMP 32
55 CLAMP2 THERMAL MONITOR PREDRIVER THERMAL SHUTDOWN 56 CLAMP3 72 MOTA
COMA from commu- COMB DECODER tation logic COMC
PREDRIVER
74 MOTB
Vref (from VCM)
SPINDLE SWITCH SPCCOUT 14 SPCC 13 CSPCCOUT CONTROL AMPLIFIER Ibrake (from VCM) VCAPY PREDRIVER 3 MOTC
SENSE AMPLIFIER
SLOPE CURRENT CONTROL
BEMF COMPARATOR
9 CT
ACROSS CCROSS BCROSS 11 GNDS/SPSENSEL 12 SLEW RSLEW to commutation logic MOTSENSE1/ SPSENSEH 2
76 MOTSENSE2 73 MOTSENSE3
RSPSENSE
MGM974
Fig.3 Block diagram, spindle motor driver.
1998 Nov 02
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andbook, full pagewidth
1998 Nov 02
PARKVOLT RPARKVOLT 51 PARK RVCMCOMPRC REF2V5 CVCMCOMPRC VCMIN 43 40 RFEEDBACK 12 V
Philips Semiconductors
Disk drive spindle and VCM with servo controller
10 CLAMP1
POWER-DOWN
55 CLAMP2 VCAPY 56 CLAMP3 8 SWITCHGATE
PRECHARGE
master ERROR PRE DRIVER 62 IVCM
71 GNDVCM1 68 GNDVCM2
OM5193H
BRAKEPOWER CBRAKEP BRAKEADJH 48 49 BRAKE AFTER PARK Ibrake (to spindle) slave SWITCH GND ERROR Vref (to spindle) PRE DRIVER
63 GNDVCM3 M
9
BRAKEDELAY RBRAKED CBRAKED 50 TRACKFWSELECT 42 SEEKSELECT 41 VCM switch RVCMSEEK DACOUT 34 RVCMTRACKFW VCM DAC 30 ADC[2]/SOUT BANDGAP SENSE
69 NIVCM
53 VCMSENSEL RVCMSENSE 52 VCMSENSEH
Product specification
MGM975
OM5193H
54 GNDV
Fig.4 Block diagram, voice coil motor driver.
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
7 PINNING SYMBOL HEATSINK MOTSENSE1/SPSENSEH MOTC HEATSINK HEATSINK HEATSINK HEATSINK SWITCHGATE CT CLAMP1 GNDS/SPSENSEL SLEW SPCC SPCCOUT VDDA2 BSTCP1 BSTCP2 CAPY POR VDDD SDEN SDATA SCLOCK CLOCK ZCROSS SCANTEST DGND ADC[0]/INTOUT ADC[1]/DIFOUT ADC[2]/SOUT ADC[3] ADC[4]/TEMP ADC[5] DACOUT PESAMPN PESAMP INTINN INTIN AGND REF2V5 1998 Nov 02 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 I/O - analog I/O - - - - analog input supply ground analog input analog input analog input supply analog I/O analog I/O digital I/O supply digital input digital I/O digital input digital input digital output digital input ground analog I/O analog I/O analog I/O analog input analog I/O analog input analog input analog input analog input analog input ground DESCRIPTION
OM5193H
dissipation pin; internally connected to the leadframe sense line of the spindle/spindle sense amplifier input dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe centre tap of the spindle power stage supply voltage spindle ground connection/spindle sense amplifier ground spindle motor slope control spindle current control compensation point of the spindle current control loop 12 V analog supply voltage booster capacitor 1 booster capacitor 2 power-on reset signal; active LOW 5 V digital supply voltage serial interface data enable; active LOW serial interface data line serial interface clock line clock input zero crossing detection signal scantest mode control; at LOW-level in normal conditions servo digital ground ADC channel 0 input/output of the A2 amplifier ADC channel 1 input/output of the A1 amplifier ADC channel 2 input/VCM sense amplifier output ADC channel 3 input ADC channel 4 input/temperature monitor, thermal shutdown ADC channel 5 input inverting input of the A1 amplifier. non-inverting input of the A1 amplifier inverting input of the A2 amplifier non-inverting input of the A2 amplifier servo analog ground
analog output spindle motor power output
analog output isolation FET driver
analog output DC-to-DC converter output (19 V)
analog output 10-bit VCM DAC output
analog output 2.5 V bandgap reference voltage 10
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL SEEKSELECT TRACKFWSELECT VCMIN VDDA1 CPOR CHK5 CHK12 BRAKEPOWER BRAKEADJH BRAKEDELAY PARKVOLT VCMSENSEH VCMSENSEL GNDV CLAMP2 CLAMP3 PWRBIAS1 HEATSINK HEATSINK HEATSINK HEATSINK IVCM GNDVCM3 HEATSINK HEATSINK HEATSINK HEATSINK GNDVCM2 NIVCM HEATSINK GNDVCM1 MOTA MOTSENSE3 MOTB HEATSINK MOTSENSE2 PWRBIAS2 HEATSINK HEATSINK HEATSINK PIN 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 I/O analog input analog input analog input supply analog input input for the seek mode input for the track-following mode VCM control input 5 V analog supply voltage set the POR delay time DESCRIPTION
OM5193H
analog output set the VDDA1 POR threshold analog output set the VDDA2 POR threshold analog input analog input analog input analog input analog input analog input ground supply supply analog input - - - - ground - - - - ground - ground brake power capacitor adjust current consumption during park mode set the brake-after-park delay time set the park voltage positive input of the VCM sense amplifier negative input of the VCM sense amplifier VCM ground connection power stage supply voltage power stage supply voltage power stages isolation bias; externally connected to the clamp dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe VCM power stage ground dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe VCM power stage ground dissipation pin; internally connected to the leadframe VCM power stage ground
analog output inverted output of the VCM (master stage)
analog output non-inverted VCM output (slave stage)
analog output spindle motor power output analog output sense line of the spindle analog output spindle motor power output - analog input - - - dissipation pin; internally connected to the leadframe power stages isolation bias; externally connected to the clamp dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe dissipation pin; internally connected to the leadframe analog output sense line of the spindle
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
76 MOTSENSE2
77 PWRBIAS2
handbook, full pagewidth
73 MOTSENSE3
75 HEATSINK
70 HEATSINK
67 HEATSINK
66 HEATSINK
HEATSINK MOTSENSE1/ SPSENSEH MOTC
65 HEATSINK 64 HEATSINK 63 GNDVCM3 62 IVCM 61 HEATSINK 60 HEATSINK 59 HEATSINK 58 HEATSINK 57 PWRBIAS1 56 CLAMP3 55 CLAMP2 54 GNDV 53 VCMSENSEL 52 VCMSENSEH 51 PARKVOLT 50 BRAKEDELAY 49 BRAKEADJH 48 BRAKEPOWER 47 CHK12 46 CHK5 45 CPOR 44 VDDA1 43 VCMIN 42 TRACKFWSELECT 41 SEEKSELECT REF2V5 40
71 GNDVCM1
1 2 3
HEATSINK 4 HEATSINK HEATSINK HEATSINK SWITCHGATE CT 5 6 7 8 9
CLAMP1 10 GNDS/SPSENSEL 11 SLEW 12
OM5193H
SPCC 13 SPCCOUT 14 VDDA2 15 BSTCP1 16 BSTCP2 17 CAPY 18 POR 19 VDDD 20 SDEN 21 SDATA 22 SCLOCK 23 CLOCK 24 ZCROSS 25 SCANTEST 26 DGND 27 ADC[0]/INTOUT 28 ADC[1]/DIFOUT 29 ADC[2]/SOUT 30 ADC[3] 31 ADC[4]/TEMP 32 ADC[5] 33 DACOUT 34 PESAMPN 35 PESAMP 36 INTINN 37 INTIN 38 AGND 39
68 GNDVCM2
80 HEATSINK
79 HEATSINK
78 HEATSINK
69 NIVCM
74 MOTB
72 MOTA
MGM976
Fig.5 Pin configuration.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
8 8.1 FUNCTIONAL DESCRIPTION Serial interface
OM5193H
determines if the transfer is a read (logic 1) or a write (logic 0). The remaining 3 bits determine the internal register to be accessed. The other 12 bits contain the programming data. In the read mode (R/W = 1), the OM5193H outputs the register contents of the selected address. In the write mode (R/W = 0), the OM5193H loads the selected register with the data presented on the SDATA pin. During sleep mode, the serial port remains active and register programmed data is retained. SCLOCK is driven by the microcontroller. When the microcontroller drives the SDATA line, the data is valid on the rising edge of SCLOCK. When the OM5193H is driving the SDATA line (in read mode after the R/W bit and 3 bits) the data is valid on the falling edge of SCLOCK. SDEN marks the end of the serial transfer. When the SDEN pin goes HIGH, the shift register data is latched into the addressed register of the OM5193H.
The serial interface is a 3-wire bidirectional port for writing and reading data to and from the internal registers of the OM5193H. Each read or write will be composed of 16 bits. For data transfer SDEN is brought LOW, serial data is presented at the SDATA pin, and a serial clock is applied to the SCLOCK pin. After the SDEN pin goes LOW, the first 16 pulses applied to the SCLOCK pin shift the data presented at the SDATA pin into an internal shift register on the rising edge of each clock pulse. An internal counter prevents more than 16 bits from being shifted into the register. The data in the shift register is latched when SDEN goes HIGH. If less than 16 clock pulses are provided before SDEN goes HIGH, the data transfer is aborted. All transfers are shifted into the serial port with the MSB first. The first 4 bits of the transfer contain address and instruction information. The MSB is the R/W bit which
handbook, full pagewidth
SDEN send/receive data address direction 1 tst 2 3 4 5 6 tren 7 8 9 10 11 tsu 12 13 14 thd 15 16 tex
SCLOCK
SDATA
R/W
A2
A1
A0
D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Write to the OM5193H write registers SDATA R/W A2 A1 A0 D11 D10 D9 D8 D7 read back data D6 D5 D4 D3 D2 D1 D0
MGM977
Write to, then read from the OM5193H
Fig.6 Serial port timing information.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
Table 1 Timing information for the serial interface PARAMETER clock frequency chip select to first active clock edge data to clock set-up time clock to data hold time time data line is driven after 5th negative clock time from positive clock for data line to be driven receive data hold time receive data set-up time last active clock to chip select; inactive on write last active clock to chip select; inactive on read time between successive serial port accesses Writeable registers of the serial interface BITS REG 11 0 1 10 9 8 7 auto Conv. select 6 range Select sleep_N DAC (6) not used not used Watchdog high Clock_N Start-up Readable registers of the serial interface BITS REG 11 0 1 10 ADC status 9 ADC (9) 8 ADC (8) 7 ADC (7) 6 ADC (6) 5 ADC (5) 4 ADC (4) 3 ADC (3) 2 ADC (2) Comdelim Blank 2 Blank 1 5 test Mode_N spindiv DAC (5) 4 3 2 -
1 2Tclk
OM5193H
SYMBOL fclk tst tsu thd trd tren trhd trsu texW texR Tbpa Table 2
MIN. 30 - - - 5 - - - - - -
MAX. ns ns ns ns ns ns ns ns ns
UNIT MHz
12 12 - 0 0 12 0 10 5
clock cycles
1
0
not used reverse break not used
opamp increm. Select_N Channel seek/ trackfw DAC (9)
not used run/ stop DAC (3)
ADC MUX address
not used DAC (8) DAC (7)
manual DAC (4)
comC comB comA DAC (2) DAC (1) DAC (0)
2 3 4 5 6 7 Table 3
not used
1 ADC (1)
0 ADC (0)
Ccross Bcross Across
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
Table 4 R/W 0 1 0 1 0 0 0 0 0 0 8.2 Address of registers A2 0 0 0 0 0 0 1 1 1 1 A1 0 0 0 0 1 1 0 0 1 1 A0 0 0 1 1 0 1 0 1 0 1 REG. 0 0 1 1 2 3 4 5 6 7 ADC status and value DESCRIPTION ADC channel and programmable options
OM5193H
commutation, sleep, and VCM switch controls commutation state in manual mode 10-bit DAC not used not used Blank 1 and Watchdog delays commutation delay limit (11 bits), internal clock divider factor Start-up and Blank 2 delays * Register#1 (5) is the spindiv bit. This bit together with register#6 (11) enables the selection of a divider factor for both converter clock and spindle clock. Clock configurations are described in Section "Commutation control" (see also Table 6). * Register#1 (6) is the sleep mode bit. When it is set to logic 0, the OM5193H will enter the low power mode. Then the commutation control generates (101) output codes on commutation signals to set spindle and VCM head into sleep mode. This causes the OM5193H to go into the brake-after-park mode. The only operating circuits are the power monitor, the voltage reference generator, the VCM precharge circuit and the serial interface. The OM5193H is in sleep mode when POR is LOW. When the power is first turned on, the POR signal goes HIGH after the POR delay. The OM5193H is then automatically set in sleep mode and thus in low power consumption mode. The VCM DAC output is in high-impedance mode, the spindle is in the brake mode and the VCM is in the precharge mode. Only after POR is HIGH and register#1 (6) is set to logic 1, OM5193H is ready to be functional. When register#1 (6) goes HIGH, the VCM DAC outputs the 2.5 V reference voltage. * Register#1 (11) is dedicated to brake the spindle motor without going in `brake-after-park' mode. The commutation sequence is shifted in order to efficiently brake the motor. This brake, called reverse brake, is activated when register#1 (11) bit is set to logic 1. Note that there is no action on the VCM input signal when the reverse brake is used. When this bit is set to logic 0, the spindle motor starts again with normal spindle commutations.
Commutation and sleep mode
Spindle control and sleep mode are controlled by writing or reading on register#1. * Register#1 (0, 1 and 2) control the spindle commutations in manual mode when run/stop, manual and sleep bits are correctly set. The commutation sequence is described in Section "Spindle driver" (see also Table 16 and Fig.12). * Register#1 (3) is the run/stop bit. After the power is turned on and POR is HIGH, the motor will not start spinning until register#1 (3) has been set to logic 1. The motor stops spinning when this bit is set to logic 0. * Register#1 (4) is the manual commutation mode bit. When this bit is set to logic 1 and register#1 (3) set to logic 1, the commutation logic in the OM5193H will be disabled so that the spindle will not automatically go to the next commutation. When register#1 (3 and 4) are set to logic 1, the microcontroller is expected to generate the different commutation states for the motor. The OM5193H will still provide the coil status which will be available by reading register#1. The different waveforms are shown in Section "Spindle driver" (see also Fig.12). Note that depending on the coil status acquisition moment, transient states (due to the flyback pulses) can be read. When register#1 (4) is set to logic 0, the manual mode is disabled and the OM5193H will automatically commutate the motor each time a zero crossing is detected. The time between the zero crossing and the next commutation is half the time between the two preceding zero crossings. This is explained in the detailed description in Section "Commutation control".
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
Reading register#1 will read the state of the 3 coils coming from the spindle control block (ACROSS, BCROSS and CCROSS). The 3 input lines will be in bits 0, 1, and 2. The different waveforms are shown in Section "Spindle Table 5 BIT 0 1 2 3 4 5 Writing register#1 DEFAULT VALUE 0 0 0 0 0 0 NAME comA comB comC run/stop manual spindiv DESCRIPTION drives COMA when in manual commutation drives COMB when in manual commutation drives COMC when in manual commutation 0 = motor to brake-after-park mode 1 = motor spinning; VCM active 0 = automatic commutation mode with run/stop = 1 1 = manual commutation mode with run/stop = 1
OM5193H
driver" (see also Fig.12). Note that depending on the coil status acquisition moment, transient states (due to the flyback pulses) can be read.
0 = the internal spindle clock frequency is controlled by register#6 (11) (bit highClock_N) 1 = an additional divider by 4 is added on the internal spindle clock 0 = sleep mode: low power mode, serial interface active, power stages in brake-after-park mode 1 = fully functional mode: sleep_N has higher priority than run/stop if both are active
6
0
sleep_N
7 8 9 10 11
0 0 1 1 0
- - seek/trackfw -
not used not used 0 = VCMIN connected to SEEKSELECT 1 = VCMIN connected to TRACKFWSELECT not used 0 = normal commutations as defined by bits above
reverse break 1 = active brake control
8.3
Commutation control
The commutation logic block generates the six different states to rotate the spindle motor. The spindle driver block provides the BEMF zero crossing information. The commutation block interprets the zero crossing information and determines the commutation delay time and the next coil state. The commutation block must take into account the following situations: * Start-up * No start * Reverse rotating * Run * Manual commutation.
The commutation logic keeps the motor spinning by commutating the motor after each detected zero crossing. It measures the time between two successive BEMF zero crossings and then determines the next commutation. The delay (commutation delay) between a zero crossing and the next commutation is half the time between the two preceding zero crossings. The commutation delay (Comdelim) can be limited to guarantee a faster lock after the motor has gone out of lock. A maximum commutation delay can be set via the serial port. The time is a function of both the external clock frequency, the individual register prescalers and the time programmed into the registers. Figure 7 shows a typical motor commutation timing diagram.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth Blank 1
Watchdog Blank 2
Start-up
Commutation delay centre tap
commutation Zc1 Zc2
false zero crossings Zc3 commutation true zero crossing
MGM978
flyback pulse
Fig.7 A typical motor commutation diagram.
* Blank 1 After a commutation occurs, the leading edge of the flyback pulse has a zero crossing (Zc1). Blank 1 timer is used to ignore this zero crossing by masking it while the timer initialized at Blank 1 value is counting. The state associated to Blank 1 down-counter will end when the counter reaches the zero value. * Blank 2 The Blank 2 timer starts counting as soon as the second zero crossing occurs (Zc2). After the second flyback pulse zero crossing, all extra zero crossings are ignored during the Blank 2 time. This allows the ringing of the coil voltage without causing a commutation advance. The state associated to Blank 2 down-counter will end when the counter reaches the zero value. * Watchdog The Watchdog timer makes sure the motor is running in forward direction. If the motor is rotating in reverse direction, the BEMF voltage is inverted and the second crossing of the flyback pulse (Zc2) will not occur until the true BEMF zero crossing is detected. Therefore, if the Watchdog timer expires before a zero crossing occurs, the motor is assumed to be rotating backwards. The commutation is advanced by one step to correct this condition. The Watchdog time must be set to a value that is greater than the flyback pulse duration, measured when the spindle motor stands still.
The state associated to the Watchdog timer will start when the one associated to Blank 1 timer is finished and will end when Zc2 occurs or when the Watchdog counter expires. * Start-up If the motor is not spinning, the BEMF zero crossings will not occur. The Start-up timer detects this if it expires before the true zero crossing (Zc3) has occurred. It will advance the commutation by one step if this happens. The state associated to Start-up timer will start when the one associated to Blank 2 timer is finished and will end when Zc3 occurs or when Start-up expires. * Comdelim The timer associated to Comdelim value allows to control the maximum commutation delay (between zero crossing and next commutation). When the true zero crossing is detected (Zc3), the timer will count until it expires and then will commutate the motor to the next step. This commutation delay time is equal to half the measured value between 2 zero crossings. The Comdelim value should be set to the maximum allowable delay value. If Zcmeas is lower than the programmed Comdelim value, the next timer value will be Zcmeas divided by 2. If Zcmeas is higher than the programmed Comdelim value, the next timer value will be the programmed Comdelim value divided by 2.
1998 Nov 02
17
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
The clock used in the commutation logic block is obtained by dividing the master clock of the chip (fCLOCK) by a clock divider (Prescaler). This internal clock will be named internalSpindleClock. Internal spindle clock configurations are described in Table 6. Table 6 Spindle clock configurations spindiv REGISTER#1 (5) 0 0 1 1 8.3.1 BLANKS, WATCHDOG AND START-UP DELAYS highClock_N REGISTER#6 (11) 0 1 0 1
OM5193H
All the delays described above (Blank 1, Watchdog, Blank 2, Start-up and Comdelim) are generated by one down-counter (called TIMER 1), see Fig.8 and one up-counter (called TIMER 2), see Fig.9. Each of them uses internalSpindleClock signal.
internalSpindleClock
1 1 1 16fCLOCK 32fCLOCK
64fCLOCK 1 128fCLOCK
An internal down-counter called TIMER 1 is used to generate Blank 1, Blank 2, Watchdog and Start-up delays. It loads one of these programmed values and counts down till it reaches zero.
handbook, full pagewidth
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Start-up Blank 2 Watchdog
Blank 1
MGL481
Fig.8 Down-counter TIMER 1.
The actual delay time will be: Delay = value x step Value is the decimal representation of the binary code programmed in one of the 6 bit registers. 2 Step = -------------------------------------------------------------internalSpindleClock
LSB
(1)
( MSB + 1 ) LSB 2 - 1 - 2 - 1 maxValue = --------------------------------------------------------------------------internalSpindleClock -2 2 = ----------------------------------------------------internalSpindleClock
( MSB + 1 ) LSB
(3)
(2)
We have to subtract (2LSB - 1) to obtain maxValue because all the bits from 0 to (LSB - 1) are set internally to zero by design.
1998 Nov 02
18
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
Table 7 Delays used for TIMER 1 DELAY Blank 1 Blank 2 Watchdog Start-up Table 8 LSB 2 5 7 14 Numerical application with fCLOCK = 30 MHz internalSpindleClock DELAYS
1 16fCLOCK 1 32fCLOCK 1 64fCLOCK
OM5193H
MSB 7 10 12 19
BITS 6 6 6 6
1
128fCLOCK
STEP Blank 1; note 1 Blank 2; note 2 Watchdog; note 3 Start-up; note 4 Notes 2.13 s 17.1 s 68.3 s 8.74 ms
MAX. 134 s 1.08 ms 4.30 ms 550 ms
STEP 4.27 s 34.1 s 137 s 17.5 ms
MAX. 269 s 2.15 ms 8.60 ms 1.101 s
STEP 8.53 s 68.3 s 273 s 35 ms
MAX. 538 ms 4.30 ms 17.2 ms 2.202 s
STEP 17.1 s 137 s 546 s 70 ms
MAX. 1.08 ms 8.60 ms 34.4 ms 4.404 s
1. The first zero crossing of the flyback should occur within this time. 2. The real zero crossing should not come within this time after the second zero crossing of the flyback pulse. 3. The time should be larger than the duration of the flyback pulse measured when the motor stands still. 4. The actual zero crossing should occur within this time after the Blank 2 time has expired. 8.3.2 COMDELIM DELAY
An internal up-counter called TIMER 2 is used to measure the time between two zero crossings and also to set the maximum commutation delay through Comdelim delay.
handbook, full pagewidth
12
11
10
9
8
7
6
5
4
3
2
1
0
Comdelim
MGL482
Fig.9 Up-counter TIMER 2.
1998 Nov 02
19
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
Comdelim is the maximum value that can be reached by TIMER 2. So, this is the maximum time between 2 zero crossings (Zc). The maximum commutation delay (Comdelim delay) is then half this value. The actual delay will be: Zc = value x step + Offset Zc ComdelimDelay = ---------2 Value is the decimal representation of the binary code programmed in the 11-bit register. 2 Step = -------------------------------------------------------------internalSpindleClock 3 Offset = -------------------------------------------------------------internalSpindleClock (we have to add this offset because bits 0 and 1 are set internally to logic 1 by design). -1 2 maximumZc = -------------------------------------------------------------internalSpindleClock
( MSB ) 1 2 - -2 maximumComdelimDelay = -------------------------------------------------------------internalSpindleClock ( MSB + 1 ) LSB
(4) (5)
(6) (7)
(8)
(9)
Table 9
Delay used for TIMER 2 DELAY Comdelim LSB 2 MSB 12 BITS 11
Table 10 Numerical application with fCLOCK = 30 MHz CLOCKOUT/PRESCALER DELAYS
1 16fCLOCK 1 32fCLOCK 1 64fCLOCK 1 128fCLOCK
STEP OFFSET MAX. STEP OFFSET MAX. STEP OFFSET MAX. STEP OFFSET MAX. (s) (s) (ms) (s) (s) (ms) (s) (s) (ms) (s) (s) (ms) Zc 2.13 1.6 0.8 4.37 2.18 4.27 2.13 3.2 1.6 8.74 4.37 8.53 4.27 6.4 3.2 17.48 17.1 8.74 8.53 12.8 6.4 35 17.48 Comdelim 1.07 delay
The commutation delay counter, which starts counting at a zero crossing, has two operating modes: * In the adaptive mode, the next zero crossing is detected before the commutation delay counter has reached its programmed value. In this mode, the next commutation will occur at the measured tZcross divided by 2 after the last zero crossing. * In the forced mode, the next zero crossing is detected after the commutation delay counter reaches its programmed value. In this mode, the counter is stopped and the commutation logic block waits until the next zero crossing occurs. After it occurs, the next commutation will be forced at the programmed commutation delay divided by 2.
1998 Nov 02
20
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
8.4 10-bit ADC with 7 analog inputs
OM5193H
Channels 0 and 1 can be used as external inputs by deactivating the 2 stand-alone op-amps A1 and A2 (op-amps are put in sleep mode), that means by putting register#0 (9) at logic 1. The ADC does not include input filtering. If this is required in the application then it must be implemented externally. 8.4.2 INPUT RANGES
The ADC is a signed 10-bit converter which uses the successive approximation conversion technique. The overall accuracy is 2% absolute error not including contribution of the reference voltage and guaranteed monotonicity. 8.4.1 INPUT CHANNELS
7 analog input channels can be sampled and converted: * Channel 0: conversion of the op-amp A2 output * Channel 1: conversion of the op-amp A1 output * Channel 2: conversion of the VCM sense amplifier output * Channel 3: conversion of an analog external signal * Channel 4: conversion of the temperature monitor + temperature shutdown signal * Channel 5: conversion of an analog external signal * Channel 6: conversion of an internal signal, controlling analog supply voltage over two ranges.
Two analog input ranges are possible: either between 1.5 and 3.5 V or between 0 and 5 V. The input range is selected with register#0 (6): * Register#0 (6) = 0: means input analog value between 1.5 and 3.5 V * Register#0 (6) = 1: means input analog value between 0 and 5 V.
Table 11 Input analog voltage and corresponding output code BIT register#0 (6) = 0 register#0 (6) = 1 8.4.3 MIN. OUTPUT = 200H minimum input value = 1.5 V minimum input value = 0 V MIDDLE OUTPUT = 000H middle input value = 2.5 V middle input value = 2.5 V MAX. OUTPUT = 1FFH maximum input value = 3.5 V maximum input value = 5 V
CONVERSION MODES
* Auto conversion on the same channel. This input channel automatic incrementation option can be deactivated by setting register#0 (8) to logic 0 with register#0 (7) at logic 1. So the behaviour of the ADC is the same as explained above, except that all the conversions are made on the channel specified by the last write access on register#0. * Single conversion mode. The automatic conversion mode can also be deactivated by setting register#0 (7) to logic 0. In this mode, a write access on register#0 will start a conversion on the specified channel and a read access will not launch any other conversion.
Three different conversion modes are possible depending on the states of register#0 (7) and register#0 (8): * Auto conversion and input channel auto incrementation mode. This mode is obtained with register#0 (7) = 1 and register#0 (8) = 1. The conversion sequence works as follows: the first A/D conversion is started by writing to serial port register#0. The address of the channel is decoded from the three LSBs in register#0 [2 to 0]. Then the OM5193H selects the addressed analog channel, samples and holds the analog input and starts the analog to digital conversion. The conversion result is obtained by reading the serial port register#0. Register#0 (10) provides the status of the conversion: it is set to 0 as long as the conversion is running and indicates that the low 10 bits of register#0 are invalid. Register#0 (10) going HIGH means the conversion is complete and guarantees the validity of the data in register#0 [9 to 0].
1998 Nov 02
21
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
8.4.4 PROGRAMMING REGISTER#0
OM5193H
Table 12 Writing register#0 BIT 0 1 2 3 4 5 0 not used not used testMode_N should be at logic 0 under normal operating conditions dedicated for test purposes of the DAC in ADC or DAC mode; should be at logic 0 under normal operating conditions selects the analog input range of the ADC: 0 = range 1.5 to 3.5 V 1 = range 0 to 5 V 7 8 9 0 0 0 autoConvSelect incrementChannel opampSelect_N selects the automatic conversion option; see details in Table 13 selects the automatic channel increment option; see details in Table 13 selects the stand-alone op-amps: 0 = op-amps activated 1 = op-amps deactivated 10 11 Note 1. Possible addresses: a) ADC MUX address = 000: channel 0 selected; b) ADC MUX address = 001: channel 1 selected; c) ADC MUX address = 010: channel 2 selected; d) ADC MUX address = 011: channel 3 selected; e) ADC MUX address = 100: channel 4 selected; f) ADC MUX address = 101: channel 5 selected; g) ADC MUX address = 110: channel 6 selected; h) ADC MUX address = 111 is an illegal address. No analog input will be selected if a conversion is asked in this channel and the ADC will convert a random analog value. For a correct initialization of the converter just after power up, when POR is HIGH (before using the ADC or the DAC), the register#0 has to be programmed as follows: write 020H and then write 000H. A read of register#0 between the 2 write accesses is not necessary. not used not used DEFAULT VALUES NAME DESCRIPTION ADC MUX address 1 ADC MUX address 2
ADC MUX address; note 1 ADC MUX address 0
6
0
rangeSelect
1998 Nov 02
22
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
Table 13 Truth table for bits 7 and 8 on register#0 in write mode; conversion mode options; note 1 autoConvSelect REGISTER#0 (7) 0 1 1 0 incrementChannel REGISTER#0 (8) 0 0 1 1 DESCRIPTION
OM5193H
Default state: no auto channel incrementation, no A/D conversion started automatically after each read of the result. Starts automatically an A/D conversion on the same channel (no channel incrementation) after each read of the result. Starts automatically an A/D conversion on the next channel (increment the channel by 1) after each read of the result. No auto channel incrementation, no A/D conversion started automatically after each read of the result (similar to the default state `00').
Note 1. The autoConvSelect bit has priority over the incrementChannel bit. 8.4.5 CONVERTER CLOCK FREQUENCY VALUES
The ADC internal clock named converterClock can have two different frequency values by programming register#6 (11) (bit highClock_N): Register#6 (11) = 1: means converterClock = Master clock (fCLOCK) divided by 8 (clockDivider = 8) Register#6 (11) = 0: means converterClock = Master clock (fCLOCK) divided by 4 (clockDivider = 4) 13 x clockDivider conversionTime = -------------------------------------------f CLOCK Table 14 Numerical application MASTER CLOCK = 10 MHz TIME Conversion time 8.5 DIVISION BY 8 10.4 s DIVISION BY 4 5.2 s MASTER CLOCK = 20 MHz DIVISION BY 8 5.2 s DIVISION BY 4 2.6 s MASTER CLOCK = 30 MHz DIVISION BY 8 3.4 s DIVISION BY 4 1.7 s
(10)
10-bit VCM DAC
The VCM DAC is a signed 10-bit digital-to-analog convertor. It will start the conversion when register#2 is written. The lowest 10 bits contain the value to be converted. Table 15 Input code and corresponding output analog voltage INPUT CODE 200H 000H 1FFH OUTPUT VOLTAGE 1.5 V 2.5 V 3.5 V
The overall accuracy is 2% absolute error not including the contribution of the reference voltage and guaranteed monotonicity.
1998 Nov 02
23
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
8.6 Reference voltage
OM5193H
It is controlled by writing to serial port register#1 (9); bit seek/trackfw: Register#1 (9) = 0: means input SEEKSELECT is selected and connected to VCMIN Register#1 (9) = 1: means input TRACKFWSELECT is selected and connected to VCMIN. 8.9 Charge pump voltage
Vref2V5 is a 2.5 V bandgap reference used as the reference voltage for the VCM circuit. Stable voltages of 1.5 and 3.5 V are generated from the 2.5 V reference and used as reference voltages for the VCM DAC and for the ADC. The 1.5 and 3.5 V voltages are only available inside the IC and are not connected to external pins. 8.7 Stand-alone op-amps
This block is composed of two low-offset stand-alone op-amps (A1 and A2) with outputs connected to the ADC channels 0 and 1. The stand-alone op-amps can be deactivated if they are not used in the application. When deactivated, they are put in sleep mode and outputs are in high-impedance. In that case, ADC channels 0 and 1 can be used as input signals. The op-amps are controlled by writing to the serial port on register#0 (9); bit opampSelect_N: Register#0 (9) = 0: means the op-amps are selected and put in normal mode Register#0 (9) = 1: means the op-amps are not selected and put in sleep mode. 8.8 Analog switch
The charge pump voltage circuit (voltage doubler) generates a power supply voltage higher than VDDA2 (12 V) power supply. This voltage is used to: * Drive the upper N-channel FETs of the power stages * Drive an optional external FET (see Section 8.18) * Set a voltage independent of the power supply and temperature for the functions BRAKEPOWER and BRAKEDELAY. Two external capacitors are used to generate the higher voltage on pin CAPY. The capacitor between BSTCP1 and BSTCP2 is charged and discharged with a frequency, which is a function of the charge pump output current and an internal oscillator frequency. The voltage on pin CAPY is typically 19.2 V. Figure 10 illustrates the charge pump block diagram.
This block is composed of a 2 input analog multiplexer used to select the seek mode or the track-following mode.
handbook, full pagewidth
VDDA2 CAPY
BSTCP2 CCAPX BSTCP1 CCAPY reference GNDS
MGM979
COMPARATOR OSCILLATOR 200 kHz
Fig.10 Charge pump voltage generator.
1998 Nov 02
24
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
8.10 Spindle driver
OM5193H
RSLEW is in and SR in V/s. Without a resistor, SR is typical 0.15 V/s and with a resistor of 90 k, the typical value is 0.5 V/s. The maximum slew rate depends on the limit for stability of the spindle loop. The spindle current ISPRUN is sensed by an external resistor RSPSENSE connected to a sense amplifier providing the internal signal SPOUT. The gain Gv of the sense amplifier is typical 10. V SPOUT = G v x R SPSENSE x I SPRUN = G xV v SPSENSEH The transconductance gain of the spindle loop is given by the following equation: V SPSENSEH I SPRUN 1 (13) g s = -------------------- = --------------------------- x -----------------------------V SPOUT R SPSENSE V SPOUT 1 = ---------------------------------------R SPSENSE x G v The control amplifier differentiates the control signal on pin SPCC from the signal SPOUT. A 0.25 V offset is subtracted from the input voltage on pin SPCC to ensure that the current command includes the zero current. With the spindle loop closed, the voltage SPOUT is given by the following equation: V SPOUT = V SPCC - V OFFSET (14) The control signal VCONTROL provided by the control amplifier is then applied to the spindle drivers. The spindle drivers control the voltage on the gate of the low-side power drivers. One of the three high-side drivers is fully on. The charge pump voltage is applied to the gate. One of the three low-side drivers is controlled by the control amplifier. Purpose is to adjust the voltage on the gate to adjust the total output resistance Rds(on) at the specified running current. The current in the spindle loop is given by the following formula: (15) I SPRUN = g s x ( V SPCC - V OFFSET ) With RSPSENSE = 0.25 : I SPRUN = 0.4 x ( V SPCC - 0.25 ) The maximum start-up current is ISPRUN = 1.9 A with SPCC signal at 5 V. Figure 11 illustrates the spindle current control loop. (12)
The spindle block contains both the low-side and high-side drivers configured as a H-bridge for a 3-phase DC brushless, sensorless motor. In each of the six possible states, two outputs are active, one sourcing current and one sinking current. The third output presents a high impedance to the motor which enables measurement of the BEMF in the corresponding motor coil. The BEMF zero crossing comparator outputs (xCROSS) are processed by the commutation logic circuit to calculate the correct moment for the next commutation, so the change to the next output state. The commutation logic circuit provides proper commutation commands for the spindle drivers thus ensuring the rotation of the motor. The commutation logic circuit also controls the spindle motor driver during start-up (no reverse rotation). The spindle should be set in the high-impedance mode (see Table 16) between the sleep mode (brake-after-park mode) and the normal running mode. Register#1 should be programmed as follows: * Write 00x001x11010 to activate the manual mode during typically less than 1 ms (time discharge of low-side power FETs) * Write 00x001x01xxx to activate the automatic running mode. The `x' states concern the seek or track-following mode register#1 (9) and the spindle prescaler value used on the application register#1 (5). Their states are specific to the application needs. The ZCROSS signal is a combination of the xCROSS signals. It can be used by the microcontroller as a tacho information for the spindle speed control loop. The external SPCC signal is used to control the spindle current. The external SPCCOUT capacitor is connected to the spindle current control amplifier to ensure the stability of the spindle current control loop. The short-circuit brake mode is entered if power-down, thermal shutdown or sleep mode occurs. A Miller network is used to obtain soft switching on the low-side and high-side drivers. The slew rate of the driver stage that is switched-off can be controlled by means of a resistor connected to the pins SLEW and GND. The slew rate is calculated using the following equation: 2.55 3 A + -----------------------------------------------------4 x ( 1 k + R SLEW ) SR = -------------------------------------------------------------------------(11) 20 pF
(16)
1998 Nov 02
25
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
VDDA2POWER
CLAMP external diode MOTx VUPPER PREDRIVER VLOWER MOTSENSE/ SPSENSEH ISPRUN SENSE AMPLIFIER SPOUT 0.25 V OFFSET CONTROL AMPLIFIER VCONTROL
RSPSENSE
GNDS/ SPSENSEL
SPCC
SPCCOUT CSPCCOUT
MGM980
Fig.11 Spindle transconductance loop schematic.
Table 16 and Fig.12 illustrate the relationship between the commutation signals and the associated output drivers and output comparators. Table 16 Input commutations to output drivers COMA 0 1 1 1 0 0 1 0 Note 1. F_L is for float-and-then-LOW (brake-after-park mode). COMB 0 0 1 1 1 0 0 1 COMC 0 0 0 1 1 1 1 0 MOTA LOW LOW float HIGH HIGH float F_L(1) float MOTB HIGH float LOW LOW float HIGH F_L(1) float MOTC float HIGH HIGH float LOW LOW F_L(1) float STATE 1 2 3 4 5 6 SLEEP Spindle high-impedance
1998 Nov 02
26
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
COMA
0
1
1
1
0
0
COMB
0
0
1
1
1
0
COMC
0
0
0
1
1
1
MOTA
L
L
F
H
H
F
MOTB
H
F
L
L
F
H
MOTC
F
H
H
F
L
L
ACROSS
BCROSS
CCROSS
ZCROSS
MGM981
L = LOW. H = HIGH. F = Floating.
Fig.12 Input commutations to output drivers.
8.11
VCM driver
The VCM driver is a linear, class AB amplifier with both low-side and high-side drivers configured as an H-bridge. The zero-current reference voltage for the VCM loop is internally set at 2.5 V. The sense resistor RVCMSENSE enables the VCM current (IVCMRUN) to be measured through the sense amplifier. The gain Gv of the sense amplifier is typically 4. The output voltage (Vsout) on pin ADC[2]/SOUT is given by the following equation: V sout = G v x R VCMSENSE x I VCMRUN + V ref2V5 = G v x ( V VCMSENSEH - V VCMSENSEL ) + V ref2V5 Figure 13 presents the VCM sense amplifier. 1998 Nov 02 27 (17)
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
REF2V5
IVCMRUN VCMSENSEH R
4R
ADC[2]/SOUT RVCMSENSE VCMSENSEL NIVCM 4R
MGM982
R
Fig.13 VCM sense amplifier.
The error amplifier (see Fig.14) compares the DACOUT input command and the output signal Vsout of the sense amplifier to generate the control voltage of the power drivers. V sout - V ref2V5 G v x R VCMSENSE x I VCMRUN V ref2V5 - V DACOUT ------------------------------------------------- = -------------------------------------- = -------------------------------------------------------------------------Ri Ro Ro (18)
handbook, full pagewidth
REF2V5 IVCMRUN VCMSENSEH SENSE AMPLIFIER Ga ERROR AMPLIFIER
RVCMSENSE VCMSENSEL NIVCM
to power drivers
ADC[2]/SOUT Ro
VCMIN Ri
DACOUT
MGM983
Fig.14 VCM transconductance gain schematic.
Finally, the transconductance gain of the VCM loop is given by the following equation: Ro I VCMRUN 1 g v = ------------------------------------------------- = ------ x -------------------------------------------R i G v x R VCMSENSE V ref2V5 - V DACOUT (19)
1998 Nov 02
28
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
The VCM loop gain is set through external resistors. The seek (high gain) or the track-following (low gain) mode is controlled with the serial bus. Purpose is to set the appropriate gain by selecting the Ri resistor through the low impedance analog 2 input switch.
handbook, full pagewidth
Ro ADC[2]/SOUT VCMIN
SEEKSELECT TRACKFWSELECT
(1)
(2)
to VCM drivers
Ri(SEEK)
Ri(TRACKFW) DACOUT
VCM switch VCM DAC
MGM984
(1) High gain. (2) Low gain.
Fig.15 VCM selectable loop gain.
8.12
Park the VCM
A VCM park sequence is initiated any time a power-down, a thermal shutdown and/or a sleep mode situation occurs. The fault signal (FAULT) initiates the VCM park sequence. This secure function is accomplished even in case of power loss. In this case, the energy provided by the rectified BEMF of the spindle motor coils is used to supply the park circuit and park the heads above a landing area. Otherwise, the energy is provided by the VDDA2 power supply through an external diode or power FET. To accomplish this function, the spindle power stage is automatically set in a high-impedance mode. The NIVCM low-side power driver is fully on while the remaining power drivers of the VCM power stage are off. The current flowing in the PARKVOLT resistor sets the voltage on the PARKVOLT pin. The voltage across the VCM load is internally regulated by the voltage on the PARKVOLT pin. An internal circuit clamps the voltage on PARKVOLT at 3VBE. Without resistor, the voltage on PARKVOLT is 3VBE. The park current Icoilpark is applied to the VCM coil. The Icoilpark park current is given by the following equation: V PARKVOLT I coilpark = -----------------------------------------------------------------------------------------(20) R VCMSENSE + R coil + R ds ( on ) ( sin k ) 1998 Nov 02 29
An RC network is connected to pin BRAKEDELAY. During the normal functioning, the voltage on the BRAKEDELAY pin is typically VBDC = 12.55 V. This value is independent of the power supply and the temperature. During park mode, the RC network discharges with a time constant . The park mode is activated as long as the voltage on the BRAKEDELAY pin is greater than the internal brake delay threshold voltage VBDT of typically 2.2 V. The tBDT park time duration (or brake delay time duration) is set by the following equation: V BDC t BDT = x In ------------ (21) V BDT where
= C BRAKED x R BRAKED
(22)
CBRAKED and RBRAKED are respectively the capacitor and the resistor connected to the BRAKEDELAY pin. Typically, with CBRAKED = 330 nF and RBRAKED = 650 k, tBDT = 400 ms. Figure 16 shows the equivalent park circuit.
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
VDDA2POWER external diode CCLAMP
CLAMP
Icoilpark
FAULT
PARKVOLT
GNDV
IVCM ACTUATOR RCOIL
NIVCM
GNDVCM
RPARKVOLT
RVCMSENSE
MGM985
Fig.16 Park circuit.
8.13
Precharge the VCM
When the voltage on the BRAKEDELAY pin goes below the brake delay threshold voltage VBDT, the BRAKEDELAY pin is short-circuited to ground. While the brake mode is activated, the VCM outputs are precharged to VDDA1 - VBE while pin VCMIN is short-circuited to ground.
This function precharges the external RC compensation network. The NIVCM low-side power driver is set off during VCM precharge. This is convenient for actuators with a magnetic latch. The park circuit is powered off during VCM precharge with the actuator latched.
1998 Nov 02
30
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
external diode VDDA2POWER VDDA1 CLAMP
GND
GND VCMIN
GND BRAKEDELAY
IVCM ACTUATOR
NIVCM
GNDVCM
GNDV
RVCMSENSE
MGM986
Fig.17 Precharge circuit.
8.14
Brake the motor
A spindle brake sequence is initiated any time a power-down, a thermal shutdown and/or a sleep mode situation occurs. The fault signal activates the brake-after-park sequence. When the heads are parked, the motor has to be braked in order to guarantee heads reliability. During the brake sequence, the heads land on a dedicated area of the disk. The OM5193H integrates a highly efficient, low cost brake circuit. It is guaranteed to be functional in case of power loss and thermal shutdown with a short time brake duration thus minimizing friction of the heads on the landing zone. The energy stored by an external capacitor connected to the BRAKEPOWER pin supplies the brake circuit during the brake-after-park sequence. The brake of the motor is accomplished by turning on the spindle low-side power components while high-side power drivers are off. This causes a short-circuit of the spindle motor coils and thus reversing the current and torque of the motor.
During normal operation, the voltage VBDC on the BRAKEPOWER pin is typically VBDC = 12.55 V. This value is independent of the power supply and the temperature. During the park sequence, the discharge of the BRAKEPOWER capacitor is set by an internal resistor, with or without an optional external resistor between BRAKEPOWER and BRAKEADJUST. The typical value of the internal resistor is 4 M. The brake sequence is started when the voltage on BRAKEDELAY goes below the brake delay threshold voltage VBDT of 2.2 V. The gates of the three spindle low-side power drivers are charged by the energy stored in the BRAKEPOWER capacitor and thus braking the motor. The OM5193H will stay in the brake-after-park mode until register#1 (3) bit run/stop is set to logic 1.
1998 Nov 02
31
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
VDDA2POWER external diode CLAMP BRAKEADJH GND MOTx CBRAKEP BRAKEDELAY MOTSENSE/ SPSENSEH CBRAKED RSPSENSE GNDS/SPSENSEL GNDV
MGM987
power-down
BRAKEPOWER RBRAKEP (optional)
RBRAKED
Fig.18 Brake circuit.
The typical value for the BRAKEPOWER capacitor is 1 F. An optional resistance could be added between the BRAKEPOWER and BRAKEADJUST pins. The values of the capacitor and the resistor are depending on the application. Without resistor, the BRAKEADJH pin must be connected to the BRAKEPOWER pin. 8.15 Power-on reset
This POR output remains HIGH until either the 5 or 12 V supplies drop below their voltage threshold, at which point the POR output becomes LOW. The CCPOR capacitor is charged with a typically 2.7 A current. The voltage on CPOR is compared to the POR circuit voltage reference of 2.55 V. The tC time is set by the following equation: C CPOR x V PORREF t C = ----------------------------------------------(23) I CPOR where VPORREF = 2.55 V and ICPOR = 2.5 A typically. The value of the tC time is set by the CCPOR capacitor value.
The Power-On Reset (POR) circuit monitors the voltage level of both 5 and 12 V supply voltages as shown in Fig.19. The POR active LOW logic line is set HIGH following the 5 and 12 V supply voltage rise above a specified voltage threshold plus a hysteresis, and delayed by a time tC that is determined by the external CPOR capacitor.
1998 Nov 02
32
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
MGM988
VDD
Vhys 0.8 V
threshold
t POR tC tC
t
Fig.19 Power-on reset timing.
The values of the 5 and 12 V supply threshold voltages can be adjusted by adding external bridge resistors respectively on the CHK5 and CHK12 pins. Internally, the CHK5 and CHK12 pins are designed as described in Fig.20.
VDDA1 handbook, halfpage RH5 CHK5 RL5 GNDS
MGM989
VDDA2 RH12 POWER-ON RESET CHK12 RL12
Fig.20 CHK5 and CHK12 pins.
A glitch monitor prevents premature POR signals due to voltage spikes on power supplies. An external capacitor has to be connected to the CHK5 and CHK12 pins to filter the noise on CHK5 and CHK12 pins caused by spikes on the power supplies; see Fig.21.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
VDD
t CHK signal (with capacitor)
V Vref t
minimum pulse time = 10 s POR tC
MGM990
t
Fig.21 Glitch detector timing.
During a power-down situation, the POR circuit must not only generate an output POR signal, but must also activate the brake-after-park sequence. In doing so, the VCM driver draws power from the BEMF of the motor coils through the clamp line during spin-down, and uses this power to bias the VCM against one of the hard stops of the actuator. This prevents the heads from landing on data zones. POR also controls the digital part of the chip. When POR is LOW, the chip is automatically set in the brake-after-park mode. When POR goes HIGH, the digital section is initialized forcing the brake-after-park sequence until a normal start is asked (by writing on register#1).
POR is considered as an asynchronous signal for the digital part and default values are loaded when POR goes HIGH. Default values for register#0 and register#1 are shown in Section "Commutation and sleep mode" (see also Table 5) and in Section "10-bit ADC with 7 analog inputs" (see also Table 12). If default values have to be loaded when POR is LOW, at least one clock pulse is needed to load the registers with default values.
1998 Nov 02
34
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
POR circuit controls the brake-after-park mode
commutation logic controls the brake-after-park mode until a spindle start is asked.
POR default values are automatically loaded when POR goes HIGH if there is no CLOCK during LOW state. CLOCK If there is a CLOCK signal when POR signal is LOW, default register values will be loaded on the rising edge.
MGM991
Fig.22 Initialization of the registers when POR is LOW.
8.16
Thermal monitor and shutdown
The OM5193H is provided with both a temperature monitor and a thermal shutdown circuit. The device is protected against over-temperature by the thermal shutdown circuit. When the temperature of the chip exceeds 150 C, the device is automatically set to the brake-after-park mode. Furthermore, the voltage Vtemp on pin ADC[4]/TEMP goes HIGH. It remains in this mode until the temperature goes below the thermal shutdown temperature minus typically 10 C.
During the normal operation, the signal Vtemp provides a voltage as a function of the chip temperature. The equation of the voltage versus the temperature is the following: V temp = 7.05 x 10
-3
x T j ( C ) + 1.995
(24)
Figure 23 presents the voltage Vtemp on pin ADC[4]/TEMP during normal operation and the voltage on thermal shutdown with hysteresis.
handbook, full pagewidth
Vtemp (V) VDDA1
MGM992
3.052 2.982
1.995 0 140 150 Tj (C)
Fig.23 Vtemp behaviour versus temperature.
1998 Nov 02
35
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
The pin ADC[4]/TEMP is internally connected to channel 4 of the ADC. The data can be read and processed by the microcontroller to control the temperature of the device during the spindle start-up sequence and normal operation and to create an early high-temperature warning. 8.17 Power supply isolation 8.18 Thermal behaviour
OM5193H
The gate is connected to the SWITCHGATE pin. During normal operation, the voltage on the SWITCHGATE pin is about 19 V and the isolation transistor is conducting. When the brake-after-park sequence is activated, the gate is short-circuited to ground. The recirculation diode is used to isolate the power supply from the power stages.
In case of power-down, the brake-after-park sequence must be supplied from the motor BEMF and the energy stored in the CLAMP capacitor. When the supply voltage for the spindle and the VCM is directly connected to the VDDA2, the energy from the motor BEMF and the CLAMP capacitor will be lost in the V supply system instead that it is used for brake-after-park sequence. Therefore, the motor and VCM supply must be isolated from the VDDA2. This can be done by means of a diode or a power FET between VDDA2 and the power supply line for the spindle and the VCM. 8.17.1 EXTERNAL ISOLATION DIODE
The OM5193H uses a dedicated leadframe to effectively drain the heat from the chip. Therefore 18 pins are connected to the leadframe and called HEATSINK. These pins must be short-circuited together and connected to a large dissipating copper area on the printed-circuit board. The copper area has to be as thick as possible. The thermal resistance can also be decreased by placing the device close to a mounting screw used to fasten the printed-circuit board to the bare casting assembly. Paths used to connect the power stages to the external components, ground and VDDA2 must be as large as possible to guarantee a minimal extra thermal resistance and a higher current capability.
A diode can be used when the motor current and the VCM current are low and the voltage drop over the diode does not limit the supply voltage range of the motor and the VCM. The diode can be either a normal diode or a Schottky diode. The type and electrical properties of the diode are determined by the load characteristics. 8.17.2 EXTERNAL POWER FET
For higher current applications, the diode can be replaced by a N-channel FET. The OM5193H contains an output to drive this N-channel FET. To prevent the brake and park currents from flowing back to VDDA2, the source of the FET must be connected to VDDA2 and the drain to the CLAMP line. In this case, the back-gate diode of the FET is reverse biased.
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
9 LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134); note 1 SYMBOL VDDA1 VDDD VDDA2 VDDA2POWER VMOTA VMOTB VMOTC VNIVCM VIVCM VUB Ves voltage on pins BSTCP1, BSTCP2, CAPY and SWITCHGATE ESD Human Body Model except for BRAKEDELAY except for BRAKEPOWER ESD Machine Model Tamb Tstg Tj Note operating ambient temperature storage temperature junction temperature -0.3 - - - - 0 -55 - output voltage -0.7 output voltage -0.3 5 V analog supply voltage 5 V digital supply voltage 12 V analog supply voltage PARAMETER MIN. -0.3 -0.3 -0.3
OM5193H
MAX. +6 +6 +13.5 +18 V V V V
UNIT
+18 +20.5 2000 500 1500 200 70 +125 150
V V V V V V C C C
1. Stressing beyond these levels may cause permanent damage to the device. This is a stress rating only and functional operation of the device under this condition is not implied. a) OVS: one pin stressed by sample; square pulse time duration = 1 s, maximum current = 1 A. b) ESD Human Body Model: JEDEC specification EIA/JESD22-A114 February 1996. c) ESD Machine Model: JEDEC specification JC-14.1 July 07 1995. 10 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. 11 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Note 1. This is obtained with a thermally enhanced printed-circuit board tied to the bare casting assembly. PARAMETER thermal resistance from junction to ambient CONDITIONS note 1 VALUE 26 UNIT K/W
1998 Nov 02
37
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
12 CHARACTERISTICS SYMBOL Supply; note 1 VDDA1 VDDD VDDA2 VDDA2POWER IDDD 5 V analog supply voltage 5 V digital supply voltage 12 V analog supply voltage 12 V analog supply voltage 5 V supply current normal mode stand-alone op-amps deactivated sleep mode IDDA2 12 V supply current normal mode sleep mode POWER BIAS VOLTAGE IL(PWRBIAS) power bias leakage current VPWRBIAS = 20.5 V - - 200 4.5 4.5 10.8 10.8 - - - - - 5.0 5.0 12.0 12.0 40 25 1 15 1.5 5.5 5.5 13.2 13.2 70 55 3 25 5 PARAMETER CONDITIONS MIN. TYP.
OM5193H
MAX.
UNIT
V V V V mA mA mA mA mA
nA
Servo control; note 2 7 CHANNEL 10-BIT ADC RESADC tCONV resolution conversion time note 3 including the sample and hold time; relative to CLOCK signal register#6 (11) = 0 register#6 (11) = 1 VI input voltage register#0 (6) = 0; Vref2V5 = 2.5 V register#0 (6) = 1; Vref2V5 = 2.5 V OFFMID offsets for middle code analog input at Vref2V5 1.5 to 3.5 V range 0 to 5 V range Ei(max) input error for maximum code relative to 1.4VI at 00H 1.5 to 3.5 V range 0 to 5 V range Ei(min) input error for minimum relative to 0.6VI at 00H code 1.5 to 3.5 V range 0 to 5 V range 1998 Nov 02 38 -40 -80 -40 -80 - - - - +40 +80 +40 +80 mV mV mV mV -5 -7 - - +5 +7 LSB LSB - - 1.5 0 - - - - 104 52 3.5 5 clock cycles clock cycles V V - 10 - bits
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL INL PARAMETER end-point integral nonlinearity CONDITIONS note 4 1.5 to 3.5 V range 0 to 5 V range DNL differential non-linearity monotonic; no missing codes; for both ranges; note 4 code value on channel 6 code error on channel 6
1
OM5193H
MIN. -4 -8 -1 - - -
TYP. +4 +8 +1
MAX.
UNIT LSB LSB LSB
CODEC6
2VDDA1 (internal analog -190 value) is sampled and converted in this channel
-
+190
LSB
EC6
represents the difference between an external 12VDDA1 conversion result and a conversion made in channel 6 includes integral non-linearity, offset and gain error 0 to 5 V range; notes 5 and 6 1.5 to 3.5 V range; note 6
-30
-
0
LSB
Etot
absolute error
-
-
2
%
Ri Ci TC
input resistance input capacitance
40 -
50 20
60 25
k pF
temperature coefficient combined temperature coefficient of gain error, integral non-linearity and offset T > 25 C T < 25 C 0 -0.05 - - - - 0.05 0 1 LSB/C LSB/C LSB
CCMATCH
channel-to-channel matching crosstalk attenuation power supply rejection ratio
the same analog voltage is applied in each channel; note 6 fi = 1 MHz; note 7 note 6
ct PSRR
66 50
- -
- -
dB dB
10-BIT VCM DAC RESDAC tst DRDAC VOO(MID) Eo(max) Eo(min) resolution settling time dynamic range offsets for middle code maximum output error minimum output error measured at code 00H: relative to Vref2V5 relative to 1.4VO at code 00H relative to 0.6VO at code 00H to within 0.5 LSB - - 0.6Vref -10 -40 -40 10 - 2.5 (1.0) - - - - 2.0 1.4Vref +10 +40 +40 bits s V mV mV mV
1998 Nov 02
39
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL VOO(max) VOO(min) INL DNL Etot PARAMETER maximum output offset voltage minimum output offset voltage end-point integral non-linearity CONDITIONS relative to Vref3V5(meas); only tested on wafer relative to Vref1V5(meas); only tested on wafer note 4 MIN. -10 -10 -2 -1 - - - - - - TYP.
OM5193H
MAX. +10 +10 +2 +1 2
UNIT mV mV LSB LSB %
differential non-linearity guaranteed monotonic; note 4 absolute error includes integral non-linearity, offset and gain error combined temperature coefficient of gain error, integral non-linearity and offset T > 25 C T < 25 C
TC
temperature coefficient
0 -100 50
- - -
100 0 -
mV/C mV/C dB
PSRR
power supply rejection ratio
note 6
REFERENCE VOLTAGES Vref1V5 Vref2V5 Vref3V5 G1V5 1.5 V reference output voltage 2.5 V reference output voltage 3.5 V reference output voltage value of the gain used to generate Vref1V5 value of the gain used to generate Vref3V5 0.6Vref2V5(meas); only tested on wafer -1 mA Iref 5 mA 1.4Vref2V5(meas); only tested on wafer Vref1V5(meas) divided by Vref2V5(meas); only tested on wafer Vref3V5(meas) divided by Vref2V5(meas); only tested on wafer note 6 note 6 1.414 2.397 3.332 0.59 1.504 2.507 3.510 0.6 1.596 2.617 3.690 0.61 V V V -
G3V5
1.39
1.4
1.41
-
TC PSRR CL ANALOG SWITCH tsw Rds(on)
temperature coefficient note 6 power supply rejection ratio load capacitance
- - 0.01 - -
- - - - -
200 50 0.1
V/C dB nF s
switching time total output resistance (source + sink + isolation)
note 6 switch closed; value at 25 C and nominal supply voltages T < 25 C
0.5 100
TC IL 1998 Nov 02
temperature coefficient T > 25 C off leakage current
- - -
- - -
0.3 -0.3 100
%/C %/C nA
40
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL PARAMETER CONDITIONS MIN. - - - - - - 1.0 60 70 - 70 TYP.
OM5193H
MAX.
UNIT
STAND-ALONE OP-AMPS VI Ii(bias) VIO IIO VO SR GB Gv(ol) SVRR tON CMRR DIGITAL PINS CBIPIN bidirectional pins capacitance CMOS level, high-drive, output stage, 8 mA 3-state input capacitance maximum output load CINPIN input pins capacitance CMOS level, high-drive, protection to VDDD and DGND 2 mA push-pull - - - 6 - 5 - 100 - pF pF pF input voltage input bias current input offset voltage input offset current output voltage slew rate gain bandwidth product open-loop voltage gain supply voltage ripple rejection power-on time common mode rejection ratio f = 1 kHz; RL = 10 k; note 6 f = 100 kHz; RL = 10 k; CL < 20pF; note 6 after sleep mode note 6 relative to Vref2V5 value note 6 RL = 10 k to Vref2V5 level RL = 10 k; CL = 20 pF 1.4 - -10 - 0.9 5 0.75 50 60 - 60 VDDA1 - 0.5 V 1 +10 100 A mV nA
VDDA1 - 0.5 V - - - - 1 - V/s MHz dB dB s dB
COUTPIN VIH VIL VOH VOL
output pins capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage
- 3 -
- - -
25 - 0.8 - 0.5
pF V V V V
IO = 2 mA IO = 2 mA
VDDA1 - 0.5 - - -
Motor control; note 1 GENERAL
Thermal protection: thermal shutdown
Tsw(off) hysT switch-off temperature thermal hysteresis note 8 note 6 143 - 150 10 157 15 C C
1998 Nov 02
41
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL PARAMETER CONDITIONS Tj = 25 C Tj = 150 C note 6 - - 6.8 MIN. TYP. - - 7.30
OM5193H
MAX.
UNIT
Thermal monitor
VO(LT) VO(HT) GT output voltage at low temperature output voltage at high temperature temperature monitor thermal gain 2.171 3.052 7.05 V V mV/C
Charge pump generator: CAPY, BSTCP1 and BSTCP2
VCP VSWITCHGATE charge pump voltage switchgate voltage running mode running mode 18.2 17.6 19.2 19 20.2 20 V V
POWER-ON RESET
Power monitor comparators: CHK12 and CHK5
Vth(12) Vhys(12) Vth(5) Vhys(5) RL12 RH12 RL5 RH5 12 V threshold voltage hysteresis on VDDA2 5 V threshold voltage hysteresis on VDDD low internal bridge resistor on CHK12 high internal bridge resistor on CHK12 low internal bridge resistor on CHK5 high internal bridge resistor on CHK5 CHK12 short-circuited to 2.55 V CHK12 short-circuited to ground CHK5 short-circuited to VDDA1 CHK5 short-circuited to ground CHK5 open-circuit CHK12 open-circuit 9.05 80 4.2 35 20 60 37 24 9.40 115 4.3 50 27.5 80 46 32 9.75 150 4.4 70 35 100 55 40 V mV V mV k k k k
Power-on reset generator: CPOR and POR
VOL Rpu ICPOR(source) Vth(CPOR) SPINDLE DRIVER LOW-level output voltage pull-up resistor source current for CPOR CPOR threshold voltage functional test IOL = 1 mA POR short-circuited to ground - 10 -3.5 - - 15 -2.5 2.55 0.5 20 -1.5 - V k A V
BEMF comparators: ACROSS, BCROSS and CCROSS
VI(CM) II(bias) common mode input voltage input bias current running mode note 6 -0.7 -10 - - VDDA2 + 0.7 V 0 A
1998 Nov 02
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Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL Vsw(comp) Vsw(tol) PARAMETER comparator switching level tolerance on the comparator switching level CONDITIONS only tested on wafer only tested on wafer MIN. -20 -3 - - TYP.
OM5193H
MAX. +20 +3
UNIT mV mV
Vsw
variation in comparator note 6 switching levels for one IC input voltage hysteresis LOW-level output voltage HIGH-level output voltage note 6 sink current = -40 A; only tested on wafer source current = 40 A; only tested on wafer
-4.2
-
+4.2
mV
Vi(hys) VOL VOH
- -
0.5 -
- 0.45 -
mV V V
VDDA1 - 0.5 -
Output drivers: MOTA, MOTB and MOTC
Rds(on)(source) high-side driver output resistance IO = 1.0 A at Tamb = 25 C IO = 1.0 A at Tamb = 125 C Rds(on)(sink) low-side driver output resistance IO = 1.0 A at Tamb = 25 C IO = 1.0 A at Tamb = 125 C VSLEW SR ISPRUN VCLP IL(SP) slew rate voltage slew rate spindle current control overvoltage protection circuit spindle power stage leakage current ISLEW = 20 A open-loop; note 9 ISLEW = 30 A; note 9 VSPCC = 1.25 V; RSENSE = 0.25 ISVDMOS > 10 mA - - - - - 0.09 0.32 380 - - 0.36 0.56 0.24 0.44 2.55 - - 400 15.8 - 0.45 0.65 0.35 0.55 - 0.23 0.87 420 - 1 V V/s V/s mA V mA
Sense amplifier: SPSENSEL and SPSENSEH
II VIO Gv TC input current on MOTSENSE input offset voltage sense amplifier gain temperature coefficient of sense amplifier gain only tested on wafer note 6 only tested on wafer note 6 10 - 9.8 - - 3 10 200 10 - 10.2 - A mV V/V ppm/C
Control amplifier: SPCC and SPCCOUT
VSPCC0 spindle zero-current reference only tested on wafer; Tamb = 25 C 230 250 270 mV
1998 Nov 02
43
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL fcut(ol) PARAMETER open-loop cut-off frequency at 0 dB CONDITIONS CSPCCOUT minimum - value = 10 nF for stability when closed loop; note 10 VI = 0 to VDD; only tested -1 on wafer MIN. - TYP. 3
OM5193H
MAX.
UNIT kHz
Logic decoder: COMA, COMB and COMC
ILI input leakage current - +1 A
VOICE COIL MOTOR DRIVER
VCM preamplifiers: VCMIN and REF2V5
II VIO fG tCOD SRVCM fG Gv(SD) Rds(on)(source) input current on VCMIN input offset voltage unity gain frequency 1 relative to Vref2V5 for zero -10 output current note 6 2 - - 1.5 1.05 IO = 1.0 A at Tamb = 25 C IO = 1.0 A at Tamb = 125 C Rds(on)(sink) low-side driver output resistance IO = 1.0 A at Tamb = 25 C IO = 1.0 A at Tamb = 125 C VCLP ILI(VCM) overvoltage protection circuit VCM power stage leakage current ISVDMOS > 10 mA - - - - - - - - 3.5 0 +10 - 5 - - 1.25 0.55 0.75 0.45 0.65 - 1 V mA A mV MHz s V/s MHz
VCM driver amplifiers
cross-over distortion delay VCM slew rate unity gain frequency slave driver voltage gain high-side driver output resistance note 6 CL = 10 pF; note 6 note 6 3 1 - 1.15 0.45 0.65 0.35 0.55 15.1 -
VCM sense amplifier: VCMSENSEL and VCMSENSEH
VI II Gv IO(sink) IO(source) VOO GB input voltage input current sense amplifier gain output sink current output source current output offset voltage Vref2V5 = 2.5 V under all conditions Tj = 0 to 140 C; note 11 Tj = 0 to 140 C; note 12 VVCMSENSEH = VVCMSENSEL = 6 V -0.7 -100 3.8 600 - -15 5 - - 4.0 - - 10 8 VDDA2 + 0.7 V +250 4.2 - -500 +35 - A A mV MHz A
gain-bandwidth product note 6
1998 Nov 02
44
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL SR Gv(ol) SVRR CMRR PARAMETER slew rate open-loop voltage gain supply voltage ripple rejection common mode rejection ratio CONDITIONS RL = 10 k; CL = 60 pF; note 6 note 6 f = 100 Hz; RL = 10 k; CL < 60 pF; note 6 note 6 1.7 75 90 90 MIN. - 80 100 - TYP.
OM5193H
MAX. 5.3 - - -
UNIT V/s dB dB dB
BRAKE-AFTER-PARK DELAY MODE
Park and brake power
VNMBP VNMBD IBPR IBPB normal mode voltage on brake power normal mode voltage on brake delay brake power park current brake power brake current VBRAKEPOWER = 12 V; VBRAKEDELAY > VBDT VBRAKEPOWER = 12 V; VBRAKEDELAY = 0 brake-after-park mode 12.0 12.0 1 - 12.55 12.55 3 - 12.9 12.9 5 1 V V A A
Park
VSWITCHGATE voltage on SWITCHGATE during brake-after-park park voltage current source maximum park voltage - - 0.1 V
Ibrake
VBRAKEPOWER = 12 V; VCLAMP = 8 V; VBRAKEDELAY > VBDT pin PARKVOLT open-circuit; VCLAMP = 8 V; VBRAKEDELAY > VBDT; Tamb = 25 C; note 13
-12
-9
-6
A
VIVCM(max)
-
1.95
-
V
VIVCM(park)
voltage on IVCM during VPARKVOLT = 1 V; park VBRAKEPOWER = 12 V; VCLAMP = 8 V; VBRAKEDELAY > VBDT voltage on NIVCM during park VPARKVOLT = 1 V; VBRAKEPOWER = 12 V; VCLAMP = 8 V; VBRAKEDELAY > VBDT VBRAKEDELAY > VBDT; note 14 RL = 20.2 ; Tamb = 25 C
0.9
1
1.1
V
VNIVCM(park)
-
15
50
mV
VMOTx(park)
voltage on MOTx during park (high impedance state) switch park resistor
3
6
9
V
Rds(on)(park) TCRds(on)(park)
- -
0.35 2
2 -
m/C
temperature coefficient note 15
1998 Nov 02
45
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL PARAMETER CONDITIONS MIN. TYP.
OM5193H
MAX.
UNIT
Brake
VBDT ILI Rds(on)(brake) brake delay time threshold voltage brake delay leakage current lower DMOS resistor during a brake IMOTx = 200 mA; Tamb = 25 C VBRAKEPOWER = 12 V 1.1 -500 - - - 2.1 - 0.24 2 3.1 +500 0.5 - V nA m/C
TCRds(on)(brake) temperature coefficient note 16
Precharge
VIVCM voltage on pin IVCM VBRAKEPOWER = 12 V; VBRAKEDELAY = 0; note 17 VBRAKEPOWER = 12 V; VBRAKEDELAY = 0; note 17 VBRAKEPOWER = 12 V; VBRAKEDELAY = 0 VDDD - VBE - V
VNIVCM
voltage on pin NIVCM
-
VDDD - VBE -
V
VVCMIN Notes
voltage on pin VCMIN
-
-
0.2
V
1. VDDD = 5 V 10%; VDDA2 = VDDA2POWER = 12 V 10%; Tamb = 0 to 70 C; unless otherwise specified. 2. VDDD = VDDA1 = 5 V 10%; Tamb = 0 to 70 C. 3. LSB on the 1.5 to 3.5 V range is equal to 1512 V; LSB on the 0 to 5 V range is equal to 2.5512 V. 4. Integral non-linearity means the deviation of a code from a straight line passing through an actual end-point and the actual centre. INL and DNL are calculated by dividing the output transfer function in 2 parts: minimum value to centre value and centre value to maximum value. 5. The temperature dependency of the resistance is expressed as follows: R sh (T) = R sh ( T ref ) x ( 1 + 1.1e - 3 x ( T - T ref ) + 1.1e - 6 x ( T - T ref )
2
where Rsh (T) = resistance at desired temperature; Rsh (Tref) = resistance at reference temperature; T = desired temperature and Tref = 27 C. 6. Guaranteed by design. 7. Channel-to-channel crosstalk is measured while driving one input and measuring the other open inputs. 8. In any case, it allows to go beyond the rated 150 C limit. 9. The description of the spindle driver circuit is given in Section 8.10. 10. RSENSE = 0.25 . Model for a motor phase: RLC network in parallel (LP = 1.5 mH, CP = 100 pF, RP = 4.6 k) in series with a resistor RS = 3.2 . Guaranteed by design. 11. VVCMSENSEL = 0.4 V, VVCMSENSEH = 0 V, measured Vsout = VO, force Vsout = VO + 10 mV. 12. VVCMSENSEL = 0 V, VVCMSENSEH = 0.4 V, measured Vsout = VO, force Vsout = VO - 10 mV. 13. VPARKVOLT(max) = 3 x VBE, VPARKVOLT = 3 x 0.70 - 3 x 2e - 3 x (T - 25) without resistor. 14. Brake-after-park mode when in sleep, POR or over-temperature mode. 15. Rds(on)T(park) = Rds(on)(park) + TRds(on)(park) x (T - 25). 16. Rds(on)T(break) = Rds(on)(break) + TRds(on)(break) x (T - 25). 17. VBE = 0.65 + 2e - 3 x (T - 25). 1998 Nov 02 46
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
13 APPLICATION INFORMATION SYMBOL Power supplies monitor CCPOR CCHK5 CCHK12 Spindle driver CSPCCOUT RSLEW RSPSENSE VCM driver RVCMCOMPRC CVCMCOMPRC RVCMSENSE RFEEDBACK RVCMSEEK RVCMTRACKFW VI Vref2V5 Clamp line CCLAMP clamp capacitor between CLAMP line and ground - 1 resistor of compensation RC network capacitor of compensation RC network VCM sense resistor feedback resistor seek mode resistor track-following mode resistor input voltage controlling the current 2.5 V reference voltage function of the VCM characteristics function of the VCM characteristics function of the VCM characteristics function of the VCM characteristics function of the VCM characteristics - - - - - - 1.5 - 130 1 0.33 2.67 2.43 10 - 2.5 spindle current control loop capacitor slew up and down resistor spindle sense resistor function of the motor characteristics note 2 - - - 10 200 0.25 POR time capacitor (time tC) analog 5 V filter analog 12 V filter note 1 between CHK5 and ground between CHK12 and ground - - - 100 1 1 PARAMETER CONDITIONS MIN. TYP.
OM5193H
MAX. - - - - - - - - - - - - 3.5 - -
UNIT
nF nF nF
nF k
k nF k k k V V F
Charge pump generator CCAPX CCAPY pump capacitor between pins BSTCP1 and BSTCP2 storage capacitor between pin CAPY and ground - - 10 22 - - nF nF
Park and brake functions CBRAKEP BRAKEPOWER capacitor brake time = 10 s; speed = 5400 RPM; Rcoil = 5 ; BEMF = 8.2 V brake time = 10 s; speed = 5400 RPM; Rcoil = 5 ; BEMF = 8.2 V - 1 - F
RBRAKEP
resistor between BRAKEADJH and BRAKEPOWER
-
0
-
M
1998 Nov 02
47
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
SYMBOL CBRAKED RBRAKED RPARKVOLT Notes 1. The description of the Power-On Reset (POR) circuit is given in Section "Power-on reset". 2. The description of the spindle driver circuit is given in Section "Spindle driver". PARAMETER BRAKEDELAY capacitor BRAKEDELAY resistor PARKVOLT resistor CONDITIONS brake delay = 400 ms brake delay = 400 ms VPARKVOLT = 1.25 V; VCLAMP = 8 V MIN. - - - TYP. 330 650 250
OM5193H
MAX. - - -
UNIT nF k k
1998 Nov 02
48
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
OM5193H
handbook, full pagewidth
microcontroller SCLOCK ZCROSS
12 V
5V CCAPY
CCAPX BSTCP1 BSTCP2
CLOCK
VDDA2
VDDA1
SDATA
VDDD
SPCC
SDEN
CAPY
POR
5V RH5 46 CHK5 CCHK5 RL5
(1) (1)
CCPOR RSLEW
(1)
CPOR 45 SLEW 12
24
13
21
22
23 19
25
15
20
44
18
16
17
CSPCCOUT CBRAKEP RBRAKEP RPARKVOLT
(1)
SPCCOUT BRAKEPOWER
(1)
14 12 V 48 47 49 51 9 50 72 CT MOTA CHK12 CCHK12 RL12
(1)
RH12
(1)
BRAKEADJH PARKVOLT
CBRAKED RBRAKED
BRAKEDELAY
REF2V5
74 40
MOTB spindle motor
OM5193H
INTIN read channel INTINN PESAMP PESAMPN 38 37 36 35
3 73 76 2
MOTC MOTSENSE3 MOTSENSE2 MOTSENSE1/ SPSENSEH RSPSENSE GNDS/SPSENSEL NIVCM VCMSENSEL RVCMSENSE
ADC[0]/INTOUT ADC[1]/DIFOUT ADC[2]/SOUT ADC[3] ADC[4]/TEMP ADC[5] VDDA2POWER SWITCHGATE
11 28 29 30 31 32 33 1, 4 to 7, 58 to 61, 64 to 67, 70, 75, 39 27 54 78 to 80 26 71 68 63 GNDVCM1 GNDVCM2 GNDVCM3 GNDV AGND HEATSINK SCANTEST DGND 52 69 53
VCMSENSEH voice coil motor M
8
62 34 DACOUT 41 42 43 TRACKFWSELECT SEEKSELECT VCMIN
IVCM
10 55 56 57 77 PWRBIAS1 PWRBIAS2 CLAMP2 CLAMP3
CLAMP1
RVCMCOMPRC CVCMCOMPRC
two different options
CCLAMP
RVCMSEEK RVCMTRACKFW
RFEEDBACK
MGM993
(1) Optional components.
Fig.24 Application diagram.
1998 Nov 02
49
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
14 PACKAGE OUTLINE QFP80: plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
OM5193H
SOT318-2
c
y X
64 65
41 40 ZE
A
e E HE wM pin 1 index bp 25 1 wM D HD ZD B vM B 24 vMA Lp L detail X A A2 A1 (A 3)
80
e
bp
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 3.2 A1 0.25 0.05 A2 2.90 2.65 A3 0.25 bp 0.45 0.30 c 0.25 0.14 D (1) 20.1 19.9 E (1) 14.1 13.9 e 0.8 HD 24.2 23.6 HE 18.2 17.6 L 1.95 Lp 1.0 0.6 v 0.2 w 0.2 y 0.1 Z D (1) Z E (1) 1.0 0.6 1.2 0.8 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT318-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
1998 Nov 02
50
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
15 SOLDERING 15.1 Introduction
OM5193H
If wave soldering cannot be avoided, for QFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 15.4 Repairing soldered joints
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). 15.2 Reflow soldering
Reflow soldering techniques are suitable for all QFP packages. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. 15.3 Wave soldering
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all QFP packages with a pitch (e) equal or less than 0.5 mm.
1998 Nov 02
51
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
16 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
OM5193H
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 17 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Nov 02
52
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
NOTES
OM5193H
1998 Nov 02
53
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
NOTES
OM5193H
1998 Nov 02
54
Philips Semiconductors
Product specification
Disk drive spindle and VCM with servo controller
NOTES
OM5193H
1998 Nov 02
55
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
295102/750/01/pp56
Date of release: 1998 Nov 02
Document order number:
9397 750 03031

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